1. Field of the Invention
The present invention relates to a production method for producing a semiconductor memory device having a high dielectric thin film capacitor.
2. Description of the Related Art
As the semiconductor memory device integration becomes higher, the area where a capacitor can be formed becomes smaller. It has become difficult to obtain a desired area for the capacitor. To cope with this, there has been suggested to use a highly dielectric substance such as BST and PZT for a dielectric film, whereas a study has been made on a highly dielectric thin film capacity using a noble metal as the upper and lower electrodes.
Now, explanation will be given on an example of production method of the highly dielectric thin film capacitor. Firstly, a MOSFET is formed by a known method on a Si substrate, and an insulation film of SiO2 is formed by the CVD method or the like. Then, a capacitance contact plug is formed from polysilicon on the aforementioned insulation film. After this, a barrier layer of Tin/Ti and a noble metal lower electrode of Ru or the like are formed and processed into a desired shape by RIE. Then, by using the electron cyclotron resonance (ECR)-MOCVD method, a thin film of (Ba, Sr)TiO3 (BST) is formed at the substrate temperature of 200 degrees C. After this, in order to get rid of peeling of the lower electrode, the BST thin film is crystallized with the RTA processing at 700 degrees C. in nitrogen. Next, a noble metal upper electrode using Ru or the like is formed to obtain a thin film capacitor. Then, with a known procedure, surface treatment is performed including formation of a passivation film.
In the highly dielectric thin film capacitor thus obtained, the BST thin film is formed at a low temperature of 200 degrees C. before crystallized by the RTA processing. Accordingly, the crystallization of the boundary between the lower electrode and the BST thin film is not sufficient. Moreover, formation of the upper electrode causes a damage to the boundary between the lower electrode and the BST thin film and crystallization of this boundary is also insufficient.
Although the leak current at room temperature is preferably in the order of 10xe2x88x928 (A/cm2) when xc2x11V is applied, the leak current during a high temperature operation becomes as high as 10xe2x88x927 (A/cm2) when xc2x11V is applied. FIG. 6 shows the relationship between the voltage applied and the leak current density at the temperature of 25 degrees C. and 80 degrees C.
Accordingly, in a highly integrated semiconductor device using as a capacitor a BST film which is one of the highly dielectric films, the capacitor need to be annealed so as to assure a sufficient crystallization of the dielectric film and a stable leak current characteristic.
However, when anneal is performed in an atmosphere containing oxygen so as to obtain a sufficient crystallization of the dielectric film and stable leak current characteristic, if the anneal temperature is high, there arises a problem of conductivity defect and peeling-off at the contact portion under the lower electrode.
Consequently, it is preferable to perform anneal at a low temperature. Japanese Patent Publication 10-233485 discloses an invention in which oxygen or hydrogen plasma treatment is performed to eliminate dielectric film defects and impurities of a dielectric object surface and after this, post-anneal is performed at the temperature equal to or below 750 degrees C. Even if the plasma treatment is performed, the 750 degrees C. is not a low temperature and there arises a problem of peel-off and conductivity defect. Moreover, the plasma treatment increases the number of production steps.
Moreover, in order to lower the anneal temperature, Japanese Patent Publication 10-189908 discloses an invention in which the crystallized BST is formed by sputter of 550 degrees C. and a metal oxide film is formed before post-anneal is performed in an oxygen atmosphere of 2 to 10 atmospheric pressure, for example, at a temperature of 500 degrees C. However, even if the anneal is performed at 500 degrees C., there arise the problems of peel-off and conductivity defects.
It is therefore an object of the present invention to provide a semiconductor memory device production method in which a low temperature anneal is performed so as to reduce a leak current at room temperature and suppress leak current increase during an operation at a high temperature.
The present invention provides a semiconductor memory device production method for a semiconductor memory device having a capacitor formed by a high dielectric insulation film and a noble metal upper electrode which are successively layered on a noble metal lower electrode, the method being characterized in that the formation of the capacitor is followed by anneal in a nitrogen atmosphere of 1 atmospheric pressure at temperature of 300 to 400 degrees C.
According to another aspect of the present invention, there is provided a semiconductor memory device production method for a semiconductor memory device having a capacitor formed by a high dielectric insulation film and a noble metal upper electrode which are successively layered on a noble metal lower electrode, the method being characterized in that the formation of the capacitor is followed by anneal in a gas mixture atmosphere of oxygen concentration of 5% or below and nitrogen under 1 atmospheric pressure at temperature of 300 to 400 degrees C.